1. Field of the Invention
The present invention relates to a plasma display panel (PDP), and more particularly, to a PDP with bus electrodes having slanted parts with increased widths.
2. Discussion of the Related Art
Generally, a plasma display panel (PDP) displays images using a gas discharge phenomenon. Since PDPs have excellent display characteristics such as display capacity, brightness, contrast, afterimage, and viewing angle, they have been widely used as a substitute for cathode ray tubes (CRTs). In a PDP, a direct current (DC) or an alternating current (AC) may be applied to electrodes to cause a gas between them to discharge, and radiation of ultraviolet rays due to the discharge excites a fluorescent material, thus causing light emission.
FIG. 1 shows an exploded view of a conventional AC type PDP. Referring to FIG. 1, pairs of transparent X and Y display electrodes 3 and 4 are formed on an inner surface of a front glass substrate 11, and address electrodes 5 are formed on an inner surface of a rear glass substrate 12. Sustained discharges are generated between each pair of the X and Y display electrodes 3 and 4 when the PDP operates. The X and Y display electrodes 3 and 4, and the address electrode 5 are formed in strips. When the front and rear glass substrates 11 and 12 are joined, the X and Y display electrodes 3 and 4 are perpendicular to the address electrode 5.
A front dielectric layer 14 and a protective layer 15 are sequentially deposited over the X and Y display electrodes 3 and 4. A rear dielectric layer 14′ is formed over the address electrode 5, and barrier ribs 17 are formed on the rear dielectric layer 14′, thus forming discharge cells 19, which are filled with inert gases including neon (Ne) and xenon (Xe). Also, predetermined portions of inner walls of the barrier ribs 17 are coated with a fluorescent layer 18. Bus electrodes 6 are formed on the X and Y display electrodes 3 and 4 to prevent increasing line resistance due to an increase in display electrode length.
In the operation of a PDP described above, a high level trigger voltage is applied to generate a discharge between the address electrode 5 and one of the X and Y display electrodes 3 and 4. The trigger voltage results in accumulation of positive ions in the front dielectric layer 14, thus generating discharge. When the trigger voltage is above a threshold voltage, discharge gases filled in the discharge cells 19 become plasmas due to the discharge between the address electrode 5 and the X or Y display electrode 3 or 4, and the discharge can be stably maintained. In such a sustained discharge state, ultraviolet rays collide against the fluorescent layer 18, thus causing light emission, which enables pixels of the respective discharge cells 19 to display an image.
FIG. 2 shows a plan view of X display electrodes 22, Y display electrodes 23, first bus electrodes 24, and second bus electrodes 25 formed in strips on an inner surface of a front glass substrate 21. Referring to FIG. 2, the X and Y display electrodes 22 and 23, which are transparent, are arranged in parallel. The first and second bus electrodes 24 and 25 are formed on the X and Y display electrodes 22 and 23, respectively. The first and second bus electrodes 24 and 25 extend to an edge of the front glass substrate 21 and connect to an external circuit (not shown) via a flexible printed cable (not shown). Each of the first bus electrodes 24 includes an extended part 24a, extending along the X display electrode 22, a slanted part 24b, formed along a right edge of the front glass substrate 21, and a connecting part 24c, connected to the external circuit. Although not shown in the drawings, each of the second bus electrodes 25 formed on the Y display electrodes 23 includes a slanted part formed along a left edge of the front glass substrate 21 and a connecting part.
Referring to FIG. 2, a width w1 of the extended part 24a is substantially equal to a width w2 of the slanted part 24b, and a width w3 of the connecting part 24c is greater than the widths w1 and w2. The widths w1 and w2 are typically about 70 to 100 μm, and their pitches are about 0.1 to 1.1 mm. In contrast, the width w3 of the connecting part 24c is typically about 200 to 300 μm and its pitch is about 0.4 to 0.6 mm.
A conventional PDP with bus electrodes such as those shown in FIG. 2 may have the following disadvantages. A PDP typically includes an ElectroMagnetic Interface (EMI) filter for shielding electromagnetic waves. The EMI filter is installed a predetermined distance from a front of a front glass substrate, thus forming a gap between the EMI filter and the front glass substrate. This gap may allow a user to see the slanted parts 24b with the naked eye. Further, formation of these slanted parts may result in an increase in bus electrode length, thus increasing electrical resistance.
To solve this problem, non-light emitting regions of a dielectric layer, such as the front dielectric layer 14 of FIG. 1, may be colored black. However, this requires an additional coloring process for the PDP manufacturing process without preventing an increase in electrical resistance due to an increase in the lengths of bus electrodes.
U.S. Pat. No. 5,952,782 suggests coating an edge of a substrate with a sealing film. However, in this case, slanted parts of a bus electrode may be partially coated with the sealing film, and thus, the coating is not helpful in improving shapes of the slanted parts and reducing electrical resistance.